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1 year ago in Electrical Engineering , RF & Microwave By Shubham

I need to model a perfect short circuit at the end of a rectangular waveguide in CST. What’s the correct boundary condition setup to avoid port or simulation errors?

I'm simulating a waveguide section terminated in a perfect short to analyze a filter's input impedance. I've tried applying a Perfect Electric Conductor (PEC) boundary on the end face, but I'm getting warnings about ports being too close to boundaries. Should I instead use a "Short Circuit" type waveguide port, or extend the waveguide wall and cap it with PEC? I need the S-parameters referenced to the port plane just before the short, not at the short itself. What's the robust method to ensure a correct, non-radiating short?

 
Parameter BoundaryConditions ShortCircuit et=0

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By Shibi Answered 1 year ago

The most reliable method is geometric: extend the waveguide's PEC walls past your intended port location, and cap the end with a PEC face. Place your waveguide port on the cross-section where you want the reference plane (e.g., 10mm from the short). The port solver will see a closed, PEC-backed waveguide section. Crucially, in the waveguide port properties, ensure "Free floating" is unchecked. This grounds the port to the surrounding PEC, making the short unambiguous. Avoid using a PEC boundary condition directly on the port plane, as it can conflict with the port solver. This geometric approach mimics a real, manufactured short. After simulation, the S11 phase will indicate the electrical distance to the short, which you can verify.

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